Micrel, Inc.
MIC2800
September 2007
18
M9999-090507-C
SW
The switch (SW) pin connects directly to the inductor
and provides the switching current necessary to operate
in PWM mode. Due to the high speed switching on this
pin, the switch node should be routed away from
sensitive nodes.
PGND
Power ground (PGND) is the ground path for the high
current PWM mode. The current loop for the power
ground should be as small as possible. Refer to the
layout considerations for more details.
SGND
Signal ground (SGND) is the ground path for the biasing
and control circuitry. The current loop for the signal
ground should be as small as possible. Refer to the
layout considerations for more details.
CSET
The SET pin is a current source output that charges a
capacitor that sets the delay time for the power-on reset
output from low to high. The delay for POR high to low
(detecting an undervoltage on any of the outputs) is
always minimal. The current source of 1.25礎 charges a
capacitor up from 0V. When the capacitor reaches
1.25V, the output of the POR is allowed to go high. The
delay time in micro seconds is equal to the Cset in
picofarads.
POR Delay (祍) = CSET (pF)
CBYP
The internal reference voltage can be bypassed with a
capacitor to ground to reduce output noise and increase
power supply rejection (PSRR). A quick-start feature
allows for quick turn-on of the output voltage. The
recommended nominal bypass capacitor is 0.1礔, but it
can be increased, which will also result in an increase to
the start-up time.
Output Capacitor
LDO1 and LDO2 outputs require a 2.2礔 ceramic output
capacitor for stability. The DC/DC switch mode regulator
requires a 2.2礔 ceramic output capacitor to be stable.
All output capacitor values can be increased to improve
transient response, but performance has been optimized
for a 2.2礔 ceramic on the LDOs and the DC/DC.
X7R/X5R dielectric-type ceramic capacitors are
recommended because of their temperature
performance. X7R-type capacitors change capacitance
by 15% over their operating temperature range and are
the most stable type of ceramic capacitors. Z5U and
Y5V dielectric capacitors change value by as much as
50% to 60% respectively over their operating
temperature ranges.
Input Capacitor
A minimum 1礔 ceramic is recommended on the VIN pin
for bypassing. X5R or X7R dielectrics are recommended
for the input capacitor. Y5V dielectrics lose most of their
capacitance over temperature and are therefore, not
recommended. A minimum 1礔 is recommended close
to the VIN and PGND pins for high frequency filtering.
Smaller case size capacitors are recommended due to
their lower ESR and ESL. Please refer to layout
recommendations for proper layout of the input
capacitor.
Inductor Selection
The MIC2800 is designed for use with a 2.2礖 inductor.
Proper selection should ensure the inductor can handle
the maximum average and peak currents required by the
load. Maximum current ratings of the inductor are
generally given in two methods; permissible DC current
and saturation current. Permissible DC current can be
rated either for a 40癈 temperature rise or a 10% to 20%
loss in inductance. Ensure that the inductor selected can
handle the maximum operating current. When saturation
current is specified, make sure that there is enough
margin that the peak current will not saturate the
inductor. Peak inductor current can be calculated as
follows:
L
f
2
V
V
1
V
I
I
IN
OUT
OUT
OUT
PK
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
+
=
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